ASML Teams Up With Chip Giants to Enable Bigger Data‑Center Chips

ASML, the Netherlands‑based maker of the giant machines that print silicon wafers, just announced a bold new roadmap. It wants to work hand‑in‑hand with the world’s biggest chip designers – think Nvidia, Intel, TSMC, Samsung and SK Hynix – to roll out larger masks for its upcoming “High‑NA” extreme‑ultraviolet (EUV) tools.

Why does mask size matter? In simple terms, a mask is a photographic film that carries the tiny circuitry pattern. Light shines through it and etches that pattern onto a wafer. The current generation of EUV tools can handle chips up to roughly 800 mm² – enough for many high‑end products, but just shy of the monster chips that power today’s AI servers.

Enter the High‑NA machines. They promise finer detail – the kind of sub‑5‑nanometer features that keep Moore’s Law alive – yet they are constrained by a smaller mask format. ASML says moving to a 12‑inch (300‑mm) mask will unlock the ability to print chips the size of today’s largest data‑centre dies, effectively merging the best of both worlds: huge area and ultra‑fine lines.

Intel is already using the first High‑NA tools for its laptop‑class processors, but the technology has yet to see high‑volume use at fabs like TSMC or Samsung. By 2030, TSMC expects to employ High‑NA in its most advanced node production, while Samsung is eyeing the same for DRAM chips by 2028. SK Hynix has also hinted at joining a consortium to explore the 12‑inch mask approach, targeting mass‑production DRAM in 2028.

ASML’s timeline is aggressive but clear. A pilot line showcasing the larger masks should be up and running by 2031, with full‑scale, high‑volume production slated for 2033. If everything goes to plan, the company’s chief technology officer Marco Pieters tells Reuters that productivity could jump by roughly 40 % – a figure that would certainly turn heads across the semiconductor supply chain.

In practice, this means chipmakers could churn out the kind of gigantic AI accelerators that Nvidia is already dreaming up, without having to slice the wafer into smaller pieces or compromise on performance. For the industry, it’s a step toward a more efficient, less wasteful manufacturing model – and possibly a new benchmark for the next wave of data‑center breakthroughs.

All eyes will be on the 2031 pilot. If the larger masks prove reliable, the ripple effect could reshape everything from cloud‑computing hardware to the economics of memory production. Until then, the collaboration between ASML and its silicon partners will be a story worth watching.